Journal of Electrical and Electronic Engineering

Archive

Volume 5, Issue 6, December 2017

  • Energy Loss in Solar Photovoltaic Systems Under Snowy Conditions

    Anis Haque, Namrata Sheth

    Issue: Volume 5, Issue 6, December 2017
    Pages: 209-214
    Received: 20 October 2017
    Accepted: 1 November 2017
    Published: 12 December 2017
    DOI: 10.11648/j.jeee.20170506.11
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    Abstract: The objective of this study is to quantify the energy loss due to snow on solar photovoltaic systems. Solar photovoltaic systems in cold temperatures have an advantage over warmer regions due to improved efficiencies. However, colder regions generally receive a significant amount of snow, which may hinder the energy output of the photovoltaic syste... Show More
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  • A Cascaded Switched-capacitor AC-AC Converter with a Ratio of 1/2n

    Jiachuan You, Qian Guo, Hui Cai

    Issue: Volume 5, Issue 6, December 2017
    Pages: 228-234
    Received: 27 December 2017
    Published: 28 December 2017
    DOI: 10.11648/j.jeee.20170506.13
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    Abstract: Based on the existing AC-AC switched-capacitor (SC) converter, this paper demonstrates a new cascaded AC-AC converter circuit topology with a ratio of 1/2n, which only consists of power switches and capacitors. The converter consists of multi-stage converters and the pre-and post-stage circuits are independent with each other. The principle of the ... Show More
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  • Research on Maximum Power Point Algorithm Based on Adaptive Duty Cycle

    Suting Liang, Lei Zhao, Wenjing Wang

    Issue: Volume 5, Issue 6, December 2017
    Pages: 235-241
    Received: 27 December 2017
    Published: 28 December 2017
    DOI: 10.11648/j.jeee.20170506.14
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    Abstract: In solar photovoltaic (PV) system it has been a tendency to extract the maximum output power from the PV panel with the decrease of production price. There are many novel control algorithms to track the maximum power point. The commonly used control algorithm is based on perturbation and observation algorithm (P&O). However, the traditional P&O met... Show More
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  • CMOL Based Quaded Transistor NAND Gate Building Block of Robust Nano Architecture

    Mohammed Hadifur Rahman, Shahida Rafique, Mohammad Shafiul Alam

    Issue: Volume 5, Issue 6, December 2017
    Pages: 242-249
    Received: 15 June 2017
    Accepted: 30 June 2017
    Published: 2 January 2018
    DOI: 10.11648/j.jeee.20170506.15
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    Abstract: Nano architectures are more prone to defects. This work is aimed at finding the effectiveness of using quaded structure devices to improve the reliability of logic gates in Nano lavel. Transistor level redundancy (Quaded Structure) has been applied in a CMOS gate (NAND) design to improve the reliability. Being an universal gate, NAND gate can be th... Show More
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