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Hardware Simulator for MIMO Propagation Channels: Time Domain Versus Frequency Domain Architectures

Published: 2 April 2013
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Abstract

A hardware simulator facilitates the test and validation cycles by replicating channel artifacts in a controllable and repeatable laboratory environment. This paper presents an overview of the digital block architectures of Multiple-Input Multiple-Output (MIMO) hardware simulators. First, the simple frequency architecture is presented and analyzed. Then, an improved frequency architecture, which works for streaming mode input signals, is considered. After, the time domain architecture is described and analyzed. The architectures of the digital block are presented and designed on a Xilinx Virtex-IV Field Programmable Gate Array (FPGA). Their accuracy, occupation on the FPGA and latencies are analyzed using Wireless Local Area Networks (WLAN) 802.11ac and Long Term Evolution System (LTE) signals. The frequency and the time approaches are compared and discussed, for indoor (using TGn channel models) and outdoor (using 3GPP-LTE channel models) environments. It is shown that the time domain architecture present the best solution for the design of the architecture of the hardware simulator digital block. Finally, a 2×2 MIMO time domain architecture is described and simulated with input signal that respects the bandwidth of the considered standards.

Published in Science Journal of Circuits, Systems and Signal Processing (Volume 2, Issue 2)
DOI 10.11648/j.cssp.20130202.13
Page(s) 37-55
Creative Commons

This is an Open Access article, distributed under the terms of the Creative Commons Attribution 4.0 International License (http://creativecommons.org/licenses/by/4.0/), which permits unrestricted use, distribution and reproduction in any medium or format, provided the original work is properly cited.

Copyright

Copyright © The Author(s), 2013. Published by Science Publishing Group

Keywords

Hardware Simulator, MIMO Radio Channel, FPGA, 802.11ac, LTE

References
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[2] B. A. Cetiner, E. Sengul, E. Akay, and E. Ayanoglu, "A MIMO system with multifunctional reconfigurable antennas," IEEE Antennas Wireless Propag. Lett., vol. 5, no. 1, pp. 463–466, Dec. 2006.
[3] Xilinx: FPGA, CPLD and EPP solutions, www.xilinx.com.
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[5] Baseband Fading Simulator ABFS, Reduced costs through baseband simulation, Rohde & Schwarz, 1999.
[6] P. Murphy, F. Lou, A. Sabharwal, P. Frantz, "An FPGA Based Rapid Prototyping Platform for MIMO Systems", Asilomar Conf. on Signals, Systems and Computers, ACSSC, vol. 1, pp. 900-904, 9-12 Nov. 2003.
[7] P. Murphy, F. Lou, J. P. Frantz, "A hardware testbed for the implementation and evaluation of MIMO algorithms", Conf. on Mobile and Wireless Communications Networks, Singa-pore, 27-29 Oct. 2003.
[8] V. Erceg et al., "TGn Channel Models", IEEE 802.11- 03/940r4, May 10, 2004.
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[12] B. Habib, H. Farhat, G. Zaharia, G. El Zein, "Hardware Simulator Design for MIMO Propagation Channel on Ship-board at 2.2 GHz", Springer, Journal of Wireless Personal Communications, 2012, doi: 10.1007/s11277-012-0954-2.
[13] S. Picol, G. Zaharia, D. Houzet and G. El Zein, "Hardware simulator for MIMO radio channels: Design and features of the digital block", Proc. of IEEE VTC-Fall 2008, Calgary, Canada, 2008.
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[15] D. Umansky, M. Patzold, "Design of Measurement-Based Stochastic Wideband MIMO Channel Simulators", IEEE Globecom, Honolulu, Hawai, 30 Nov. - 4 Dec. 2009.
[16] H. Eslami, S.V. Tran and A.M. Eltawil, "Design and imple-mentation of a scalable channel Emulator for wideband MIMO systems", IEEE Trans. on Vehicular Technology, vol. 58, no. 9, pp. 4698-4708, Nov. 2009.
[17] S. Fouladi Fard, A. Alimohammad, B. Cockburn, C. Schlegel, "A single FPGA filter-based multipath fading emulator", VTC-Fall, Canada, 2009.
[18] B. Habib, G. Zaharia and G. El Zein, "MIMO Hardware Simulator: New Digital Block Design in Frequency Domain for Streaming Signals", Journal of Wireless Networking and Communications, Vol. 2, No. 4, 2012, pp. 55-65.
[19] W. C. Jakes, "Microwave mobile communications", Wiley & Sons, New York, Feb. 1975.
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Cite This Article
  • APA Style

    Bachir Habib, Gheorghe Zaharia, Ghais El Zein. (2013). Hardware Simulator for MIMO Propagation Channels: Time Domain Versus Frequency Domain Architectures. Science Journal of Circuits, Systems and Signal Processing, 2(2), 37-55. https://doi.org/10.11648/j.cssp.20130202.13

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    ACS Style

    Bachir Habib; Gheorghe Zaharia; Ghais El Zein. Hardware Simulator for MIMO Propagation Channels: Time Domain Versus Frequency Domain Architectures. Sci. J. Circuits Syst. Signal Process. 2013, 2(2), 37-55. doi: 10.11648/j.cssp.20130202.13

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    AMA Style

    Bachir Habib, Gheorghe Zaharia, Ghais El Zein. Hardware Simulator for MIMO Propagation Channels: Time Domain Versus Frequency Domain Architectures. Sci J Circuits Syst Signal Process. 2013;2(2):37-55. doi: 10.11648/j.cssp.20130202.13

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  • @article{10.11648/j.cssp.20130202.13,
      author = {Bachir Habib and Gheorghe Zaharia and Ghais El Zein},
      title = {Hardware Simulator for MIMO Propagation Channels: Time Domain Versus Frequency Domain Architectures},
      journal = {Science Journal of Circuits, Systems and Signal Processing},
      volume = {2},
      number = {2},
      pages = {37-55},
      doi = {10.11648/j.cssp.20130202.13},
      url = {https://doi.org/10.11648/j.cssp.20130202.13},
      eprint = {https://article.sciencepublishinggroup.com/pdf/10.11648.j.cssp.20130202.13},
      abstract = {A hardware simulator facilitates the test and validation cycles by replicating channel artifacts in a controllable and repeatable laboratory environment. This paper presents an overview of the digital block architectures of Multiple-Input Multiple-Output (MIMO) hardware simulators. First, the simple frequency architecture is presented and analyzed. Then, an improved frequency architecture, which works for streaming mode input signals, is considered. After, the time domain architecture is described and analyzed. The architectures of the digital block are presented and designed on a Xilinx Virtex-IV Field Programmable Gate Array (FPGA). Their accuracy, occupation on the FPGA and latencies are analyzed using Wireless Local Area Networks (WLAN) 802.11ac and Long Term Evolution System (LTE) signals. The frequency and the time approaches are compared and discussed, for indoor (using TGn channel models) and outdoor (using 3GPP-LTE channel models) environments. It is shown that the time domain architecture present the best solution for the design of the architecture of the hardware simulator digital block. Finally, a 2×2 MIMO time domain architecture is described and simulated with input signal that respects the bandwidth of the considered standards.},
     year = {2013}
    }
    

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    T1  - Hardware Simulator for MIMO Propagation Channels: Time Domain Versus Frequency Domain Architectures
    AU  - Bachir Habib
    AU  - Gheorghe Zaharia
    AU  - Ghais El Zein
    Y1  - 2013/04/02
    PY  - 2013
    N1  - https://doi.org/10.11648/j.cssp.20130202.13
    DO  - 10.11648/j.cssp.20130202.13
    T2  - Science Journal of Circuits, Systems and Signal Processing
    JF  - Science Journal of Circuits, Systems and Signal Processing
    JO  - Science Journal of Circuits, Systems and Signal Processing
    SP  - 37
    EP  - 55
    PB  - Science Publishing Group
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    UR  - https://doi.org/10.11648/j.cssp.20130202.13
    AB  - A hardware simulator facilitates the test and validation cycles by replicating channel artifacts in a controllable and repeatable laboratory environment. This paper presents an overview of the digital block architectures of Multiple-Input Multiple-Output (MIMO) hardware simulators. First, the simple frequency architecture is presented and analyzed. Then, an improved frequency architecture, which works for streaming mode input signals, is considered. After, the time domain architecture is described and analyzed. The architectures of the digital block are presented and designed on a Xilinx Virtex-IV Field Programmable Gate Array (FPGA). Their accuracy, occupation on the FPGA and latencies are analyzed using Wireless Local Area Networks (WLAN) 802.11ac and Long Term Evolution System (LTE) signals. The frequency and the time approaches are compared and discussed, for indoor (using TGn channel models) and outdoor (using 3GPP-LTE channel models) environments. It is shown that the time domain architecture present the best solution for the design of the architecture of the hardware simulator digital block. Finally, a 2×2 MIMO time domain architecture is described and simulated with input signal that respects the bandwidth of the considered standards.
    VL  - 2
    IS  - 2
    ER  - 

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Author Information
  • Institute of Electronics and Telecommunications of Rennes, IETR, UMR CNRS 6164, Rennes, France

  • Institute of Electronics and Telecommunications of Rennes, IETR, UMR CNRS 6164, Rennes, France

  • Institute of Electronics and Telecommunications of Rennes, IETR, UMR CNRS 6164, Rennes, France

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