| Peer-Reviewed

Enhance Performance in Implementing the Security of Partially Reconfigurable Embedded Systems

Received: 17 January 2014     Published: 28 February 2014
Views:       Downloads:
Abstract

System Security means protecting confidentiality and integrity of input or output data to as well as the safety of the system. To meet stated security requirements, designers will need to add some special functions into the system. However, in several cases including high-throughput requirement, limited resource or trade-off between risks and costs, adding security functions should be taken into comprehensive consideration. This paper presents a method to enhance safety and update speed of the partially reconfigurable embedded systems based on FPGA is updated remotely via the Internet or from external storage devices such as a Compact Flash (CF) memory card.

Published in American Journal of Embedded Systems and Applications (Volume 2, Issue 1)
DOI 10.11648/j.ajesa.20140201.11
Page(s) 1-5
Creative Commons

This is an Open Access article, distributed under the terms of the Creative Commons Attribution 4.0 International License (http://creativecommons.org/licenses/by/4.0/), which permits unrestricted use, distribution and reproduction in any medium or format, provided the original work is properly cited.

Copyright

Copyright © The Author(s), 2014. Published by Science Publishing Group

Keywords

Reconfigurable, Bitstream Security, Embedded System, Partial Reconfiguration

References
[1] Xilinx Inc., "Partial Reconfiguration User Guide," User guide UG702 (v14.5), 2013. [Online]. Available: http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_5/ug702.pdf.
[2] Y. Hori, A. Satoh, H. Sakane, and K. Toda, "Bitstream Protection in Dynamic Partial Reconfiguration Systems Using Authenticated Encryption," IEICE transactions on Information and Systems, Vol.E96-D, No. 11, pp. 2333–2343, November 2013.
[3] I.Gonzalez and F.J. Gomez-Arribas, "Ciphering algorithms in MicroBlaze-based embedded systems," in IEEE Proceedings - Computers and Digital Techniques, 2006, pp. 87–92.
[4] NIST., "Announcing the Advanced Encryption Standard (AES)," National Institute of Standards and Technology, 2001. [Online]. Available: http://csrc.nist.gov/publications/fips/fips197/fips-197.pdf‎.
[5] NIST., "Secure Hash Standard (SHS)," National Institute of Standards and Technology, 2012. [Online]. Available: csrc.nist.gov/publications/fips/fips180-4/fips-180-4.pdf‎.
[6] Xilinx Inc., "LogiCORE IP AXI Ethernet (v3.01a)," Product Specification, 2012. [Online]. Available:xilinx.com/support/documentation/ip_documentation/axi_ethernet/v3_01_a/ds759_axi_ethernet.pdf.
[7] Xilinx Inc., "LogiCORE IP AXI DMA (v5.00.a)," Product Specification, 2011. [Online]. Available:xilinx.com/support/documentation/ip_documentation/axi_dma/v5_00_a/pg021_axi_dma.pdf.
[8] Xilinx Inc., "Xilinx DS844 LogiCORE IP AXI Master Burst (v1.00.a)," Product Specification, 2011. [Online]. Available: http://www.xilinx.com/support/documentation/ip_documentation/axi_master_burst/v1.00a/ds844_axi_master_burst.pdf.
[9] N. Kavvadias, V. Giannakopoulou, and K. Masselos, "FSMD-Based Hardware Accelerators for FPGAs," In Embedded System - Theory and Design Methodology. InTech, 2012, pp. 143–166.
Cite This Article
  • APA Style

    Tran Thanh, Tran Hoang Vu, Nguyen Duy Phuong, Do Son Tung, Cuong Nguyen-Van, et al. (2014). Enhance Performance in Implementing the Security of Partially Reconfigurable Embedded Systems. American Journal of Embedded Systems and Applications, 2(1), 1-5. https://doi.org/10.11648/j.ajesa.20140201.11

    Copy | Download

    ACS Style

    Tran Thanh; Tran Hoang Vu; Nguyen Duy Phuong; Do Son Tung; Cuong Nguyen-Van, et al. Enhance Performance in Implementing the Security of Partially Reconfigurable Embedded Systems. Am. J. Embed. Syst. Appl. 2014, 2(1), 1-5. doi: 10.11648/j.ajesa.20140201.11

    Copy | Download

    AMA Style

    Tran Thanh, Tran Hoang Vu, Nguyen Duy Phuong, Do Son Tung, Cuong Nguyen-Van, et al. Enhance Performance in Implementing the Security of Partially Reconfigurable Embedded Systems. Am J Embed Syst Appl. 2014;2(1):1-5. doi: 10.11648/j.ajesa.20140201.11

    Copy | Download

  • @article{10.11648/j.ajesa.20140201.11,
      author = {Tran Thanh and Tran Hoang Vu and Nguyen Duy Phuong and Do Son Tung and Cuong Nguyen-Van and Nguyen Van Cuong and Pham Ngoc Nam},
      title = {Enhance Performance in Implementing the Security of Partially Reconfigurable Embedded Systems},
      journal = {American Journal of Embedded Systems and Applications},
      volume = {2},
      number = {1},
      pages = {1-5},
      doi = {10.11648/j.ajesa.20140201.11},
      url = {https://doi.org/10.11648/j.ajesa.20140201.11},
      eprint = {https://article.sciencepublishinggroup.com/pdf/10.11648.j.ajesa.20140201.11},
      abstract = {System Security means protecting confidentiality and integrity of input or output data to as well as the safety of the system. To meet stated security requirements, designers will need to add some special functions into the system. However, in several cases including high-throughput requirement, limited resource or trade-off between risks and costs, adding security functions should be taken into comprehensive consideration. This paper presents a method to enhance safety and update speed of the partially reconfigurable embedded systems based on FPGA is updated remotely via the Internet or from external storage devices such as a Compact Flash (CF) memory card.},
     year = {2014}
    }
    

    Copy | Download

  • TY  - JOUR
    T1  - Enhance Performance in Implementing the Security of Partially Reconfigurable Embedded Systems
    AU  - Tran Thanh
    AU  - Tran Hoang Vu
    AU  - Nguyen Duy Phuong
    AU  - Do Son Tung
    AU  - Cuong Nguyen-Van
    AU  - Nguyen Van Cuong
    AU  - Pham Ngoc Nam
    Y1  - 2014/02/28
    PY  - 2014
    N1  - https://doi.org/10.11648/j.ajesa.20140201.11
    DO  - 10.11648/j.ajesa.20140201.11
    T2  - American Journal of Embedded Systems and Applications
    JF  - American Journal of Embedded Systems and Applications
    JO  - American Journal of Embedded Systems and Applications
    SP  - 1
    EP  - 5
    PB  - Science Publishing Group
    SN  - 2376-6085
    UR  - https://doi.org/10.11648/j.ajesa.20140201.11
    AB  - System Security means protecting confidentiality and integrity of input or output data to as well as the safety of the system. To meet stated security requirements, designers will need to add some special functions into the system. However, in several cases including high-throughput requirement, limited resource or trade-off between risks and costs, adding security functions should be taken into comprehensive consideration. This paper presents a method to enhance safety and update speed of the partially reconfigurable embedded systems based on FPGA is updated remotely via the Internet or from external storage devices such as a Compact Flash (CF) memory card.
    VL  - 2
    IS  - 1
    ER  - 

    Copy | Download

Author Information
  • School of Electronics and Telecommunications, Hanoi University of Science and Technology, Hanoi, Vietnam

  • School of Electronics and Telecommunications, Hanoi University of Science and Technology, Hanoi, Vietnam

  • School of Electronics and Telecommunications, Hanoi University of Science and Technology, Hanoi, Vietnam

  • School of Electronics and Telecommunications, Hanoi University of Science and Technology, Hanoi, Vietnam

  • School of Electronics and Telecommunications, Hanoi University of Science and Technology, Hanoi, Vietnam

  • Faculty of Electronics and Telecommunications, Danang University of Science and Technology, Danang, Vietnam

  • School of Electronics and Telecommunications, Hanoi University of Science and Technology, Hanoi, Vietnam

  • Sections