Electrical Performance and Stability of ZnO Thin-Film Transistors Incorporating Gadolinium Oxide High-k Dielectrics
Advances in Materials
Volume 7, Issue 4, December 2018, Pages: 137-143
Received: Nov. 21, 2018;
Accepted: Dec. 13, 2018;
Published: Jan. 10, 2019
Views 131 Downloads 52
Divine Khan Ngwashi, Department of Electrical and Electronics Engineering, University of Buea, Buea, Cameroon
Shashi Paul, Emerging Technologies Research Centre, De Montfort University, Leicester, United Kingdom
Anjana Devi, Inorganic Chemistry II, Ruhr-University, Bochum, Germany
Richard Barrie Michael Cross, Emerging Technologies Research Centre, De Montfort University, Leicester, United Kingdom
This work investigates the performance and gate bias stress instability of ZnO-based thin film transistors (ZnO-TFTs) incorporating amorphous gadolinium oxide, a high-k dielectric material. ZnO thin films produced via radio frequency (RF) reactive magnetron sputtering were used as channel layers. The source/drain electrodes were achieved by the thermal evaporation of aluminium on a bottom gate inverted staggered ZnO TFT structure. Gadolinium oxide (Gd2O3) deposited by metal-organic chemical vapour deposition (MOCVD) served as the gate dielectric. The electrical characterisation of the ZnO-TFTs produced showed improvement in performance and stability in comparison to thermally-grown SiO2-based ZnO TFTs fabricated under the same conditions. The effective channel mobility, on-off current ratio and subthreshold swing of the TFTs incorporating Gd2O3 dielectric were found to be 33.5 cm2 V-1s-1, 107, and 2.4 V/dec respectively when produced. The electrical characterisation of the same devices produced with SiO2 dielectrics exhibited effective mobility, on-off current ratio and subthreshold swing of 7.0 cm2 V-1s-1, 106 and 1.4 V/dec respectively. It is worth noting that, the ZnO active layer was sputtered under room temperature with no intentional heating and post-deposition annealing treatment. On application of gate bias stressing on these thin film transistors, it was observed that threshold voltage instability increased with stress period in all device types. Transistors incorporating Gd2O3 however, were found to exhibit lesser threshold voltage related instability with regards to gate bias stressing in comparison to similar devices incorporating SiO2 as gate dielectric. It was also observed that the effective mobility in both devices tend to stabilize with prolonged gate bias application. In this work, it is demonstrated that Gd2O3 dielectric is a potential alternative to SiO2 for the fabrication of ZnO TFTs with improved performance and electrical stability under prolonged use.
Divine Khan Ngwashi,
Richard Barrie Michael Cross,
Electrical Performance and Stability of ZnO Thin-Film Transistors Incorporating Gadolinium Oxide High-k Dielectrics, Advances in Materials.
Vol. 7, No. 4,
2018, pp. 137-143.
H. Gleskova and S. Wagner, APPL PHYS LETT, 79 (2001) 3347-3349.
R. Banerjee, T. Furui, H. Okushi and K. Tanaka, APPL PHYS LETT, 53 (1988) 1829-1831.
Y. Tang, S. Dong, R. Braunstein and B. von Roedern, APPL PHYS LETT, 68 (1996) 640-642.
T. Hirao, M. Furuta, T. Hiramatsu, T. Matsuda, C. Li, H. Furuta, H. Hokari, M. Yoshida, H. Ishii and M. Kakegawa, IEEE T ELECTRON DEV, 55 (2008) 3136-3142.
Y.-K. Moon, S. Lee, D.-H. Kim, J.-H. Lee, C.-O. Jeong and J.-W. Park, J KOREAN PHYS S, 55 (2009) 1906-1909.
D. K. Ngwashi, R. B. M. Cross and S. Paul, MATER RES SOC SYMP PROC, 1201 (2010) H05-39.
M. Kumar, H. Jeong, A. Kumar, B. P. Singh and D. Lee, MAT SCI SEMICON PROC, 71 (2017) 204-208.
J. Dong, D. Han, H. Li, W. Yu, S. Zhang, X. Zhang and Y. Wang, APPL SURF SCI, 433 (2018) 836-839.
S. M. Kim, M.-S. Kang, W.-J. Cho and J. T. Park, MICROELECTRON RELIAB, 76-77 (2017) 327-332.
P.-R. Xu and R.-H. Yao, DISPLAYS, 53 (2018) 14-17.
C.-F. Hu, T. Teng and X.-P. Qu, SOLID STATE ELECTRON, (2018).
S.-H. Lee, J.-H. Bang, W. Kim, H.-S. Uhm and J.-S. Park, THIN SOLID FILMS, 520 (2011) 1479-1483.
D. Zhou, B. Li, H. Wang, Y. Peng, J. Zhao, M. Salik, L. Yi, X. Zhang and Y. Wang, J ALLOY COMPD, 648 (2015) 587-590.
K. Lee, J. H. Kim, S. Im, C. S. Kim and H. K. Baik, APPL PHYS LETT, 89 (2006) 133507 - 1335010.
J. Kwo, M. Hong, A. R. Kortan, K. T. Queeney, Y. J. Chabal, J. P. Mannaerts, T. Boone, J. J. Krajewski, A. M. Sergent and J. M. Rosamilia, APPL PHYS LETT, 77 (2000) 130-132.
S. Vyas, A. D. D. Dwivedi and R. D. Dwivedi, SUPERLATTICE MICROST, 120 (2018) 223-234.
M. Buonomo, N. Wrachien, N. Lago, G. Cantarella and A. Cester, MICROELECTRON RELIAB, 88-90 (2018) 882-886.
A. P. Milanov, T. Toader, H. Parala, D. Barreca, A. Gasparotto, C. Bock, H.-W. Becker, D. K. Ngwashi, R. Cross, S. Paul, U. Kunze, R. A. Fischer and A. Devi, CHEM MATER, 21 (2009) 5443-5455.
P. Liu, T. P. Chen, Z. Liu, C. S. Tan and K. C. Leong, THIN SOLID FILLMS, 545 (2013) 533-536.
K. J. Yang and C. Hu, IEEE T ELECTRON DEV, 46 (1999) 1500-1501.
L. Zhang, J. Li, X. W. Zhang, D. B. Yu, X. Y. Jiang and Z. L. Zhang, PHYS STATUS SOLIDI A, 207 (2010) 1815-1819.
D. Gupta, S. Yoo, C. Lee and Y. Hong, IEEE T ELECTRON DEV, 58 (2011) 1995-2002.